In a number of power management applications, in order to increase energy conversion efficiency, a work frequency of a trench field-effect device (trench MOSFET) greater than 500 KHz is required. This requires that the trench field-effect device (trench MOSFET) has a smaller gate charge and a smaller on-state resistance. Therefore, continuously reducing a figure of merit (i.e., a product of the gate charge Qg and the on-state resistance Ron of the trench field-effect device) of the trench field-effect device is a goal that people pursue to keep optimizing the trench field-effect device. In a prior art, people generally form a thick oxide layer (the thickness of the thick oxide layer is greater than that of a trench sidewall gate dielectric layer) in a bottom of a trench to reduce the gate charge and the figure of merit of the trench field-effect device.
In the prior art, there are a number of methods for forming a trench thick oxide, such as local thermal oxidation (LOCOS), high-density plasma deposition (HDP), etc. There is also a literature that uses lightly-doped polysilicon to form the thick oxide layer of the bottom of the trench. However, in a practical fabrication process, it is found that the figure of merit of the trench field-effect device is higher using the above techniques and the fabrication is more complicated.